That’s why executives describe optics as essential, not optional. In light of Ayar Labs’ recent mega-round funding, Mark Wade, CEO and co-founder of Ayar Labs, clearly states: “AI infrastructure is hitting a power wall driven by interconnect inefficiency.”
Copper remains common, but the physics tax is rising. At very high bandwidths, copper’s effective range drops, and the need for equalization and retiming to keep signal quality improves becomes more demanding in terms of power and cost. This is the main reason why co-packaged optics (and optical I/O chiplets) are now given priority on “CEO timelines” rather than “research timelines”: moving the optical engine closer to the switch and compute silicon, reducing electrical trace lengths, and transitioning the long-distance part of the connection to light.
A helpful indicator for investors: market experts expect silicon photonics’ share in optical transceivers to grow considerably as linear-drive pluggables and CPO mature. One forecast from Light Counting predicts silicon photonics’ share increasing from about 30% in 2025 to roughly 60% in 2030.
Pluggable optics (currently): These are the hot-swappable 400G/800G/1.6T modules that fit into switches and NICs. They are operationally convenient (easy to swap, maintain, and sourced from multiple vendors), and they serve as the workhorse for the current buildout cycle. OFC 2025 already showcased numerous 1.6T announcements involving modules, DSPs, and photonic IC advancements – evidence that the industry is rapidly scaling what it can produce and qualify.
Co-packaged optics (next): CPO integrates optical engines within the same package as a switch ASIC (or eventually, compute components), significantly reducing the electrical link length and improving bandwidth density and energy efficiency. This approach is widely recognized in the technical literature as disruptive because it jointly optimizes electronics, photonics, and advanced packaging. The immediate reality is that CPO is not just a photonics issue; it also involves packaging, testing, thermal management, and reliability concerns, which necessitate new supply-chain relationships—such as who owns the optical engine, who qualifies fiber attachment, and who handles failures.
Optical I/O chiplets (the ultimate goal for scaling up): This is where silicon photonics naturally integrates with semiconductors—optical links are designed as chiplets and engines connected via chiplet standards rather than as separate modules. A key component in this ecosystem is the UCIe Consortium and the wider chiplet community it supports. Ayar Labs’ announcement of a UCIe optical interconnect chiplet (with 8 Tbps bandwidth) exemplifies this trend: optics engineered to fit within standard chiplet architecture, rather than being added externally to systems.
A related challenge involves packaging platforms for photonic engines. TSMC has clearly addressed this with COUPE (Compact Universal Photonic Engines), which is positioned as a silicon photonics integration system and co-packaged optics platform to accelerate chip-to-chip and machine-to-machine communication. Whether you choose pluggables, CPO, or optical chiplets, the main issues revolve around packaging and manufacturability.
Capital allocation clearly shows that “optics is imperative” has shifted from PowerPoint presentations to procurement.
Start with the latest headline: Ayar Labs announced a $500M Series E at roughly a $3.75B valuation, aiming to scale high-volume production and testing capacity for co-packaged optics. This is not a “science project” round; it’s a manufacturing and deployment round.
Then observe how the ecosystem revolves around it. NVIDIA announced a $2 billion investment in both Coherent and Lumentum, along with multi-year purchase commitments and future access to advanced optical manufacturing capacity, effectively treating optical supply as a strategic infrastructure.
M&A follows the same rule: own the optical roadmap or risk being limited by someone else’s. Over the past year, the market has seen multiple acquisitions that—collectively—seem to be a land grab across the photonics stack.
- AMD acquired Enosemi to accelerate photonics and co-packaged optics solutions for next-generation AI systems.
- Marvell Technology announced the acquisition of Celestial AI for an initial payment of about $3.25 billion, with potential additional payments tied to milestones, clearly positioning it as a scale-up connectivity solution for AI data centers.
- GlobalFoundries acquired Advanced Micro Foundry to expand its silicon photonics manufacturing footprint and develop AI infrastructure and quantum networking capabilities.
- Ciena announced it will acquire Nubis Communications for $270 million, focusing on “inside the data center” connectivity for AI workloads (scale-up/scale-out density).
- FormFactor acquired Keystone Photonics to enhance wafer-level testing for silicon photonics and co-packaged optics—one of the most overlooked bottlenecks in scaling SiPh.
If you step back, the pattern is evident: capital is moving not only to “better transceivers,” but across the entire chain – lasers, optical engines, chiplets, packaging platforms, wafer testing, and foundry capacity – because that’s where scaling faces challenges in the real world.
Our friend and EE Times Executive Editor Nitin Davad offers these comments:
NewPhotonics — Breaking the “DSP Wall” with All-Optical Processing
As AI infrastructure reaches the “interconnect-powered ceiling,” NewPhotonics has become a key exception. While the industry has traditionally depended on power-intensive Digital Signal Processors (DSPs) to ensure data integrity, NewPhotonics is developing an all-optical domain-signal-processing method that greatly cuts power use and latency for next-generation AI clusters.
Core Technology: The All-Optical Paradigm Shift
NewPhotonics tackles the “power wall” by moving signal equalization and modulation into the optical domain, effectively bypassing the limitations of traditional CMOS-based DSPs.
- OSPic™ (Optical Signal Processor): This proprietary engine directly processes electrical impairments in the optical domain. By performing equalization in the optical domain, the company reduces RF design constraints and enables consistent link performance at extreme speeds.
- Syncra™ Heaterless Modulation: A significant breakthrough announced in March 2026 is their heaterless micro-ring modulator (MRM) with zero optical loss for monitoring. Traditional ring modulators require about 25% of the optical power for monitoring and constant heating/cooling to stay stable, which consumes a lot of power; NewPhotonics controls the refractive index without heaters, achieving energy efficiency below 1.5 pJ/bit.
- NiOX™ – Non-Invasive Optical Monitoring and Calibration – Paradigm shift in the way silicon photonics ICs work, with Zero-Optical loss for monitoring (no splitters and no monitoring PD needed) and heater-free calibration. This change the traditional use of thermo-optics with accurate and fast-response stabilized photonics in any temperature and during temperature changes.
- Photonic OFDMA & TDM: The company uses Time-Division Multiplexing (TDM) and OrthogonalFrequency-Division Multiple Access (OFDMA) to add lanes to a single wavelength, enabling the highest baud rates in the market without the complexity of 16 QAM or coherent optics.
- Close collaboration with Tower USA for dedicated manufacturing of silicon photonics, fully integrated with lasers, EAM modulators, and the OSPic™ in a single monolithic die. Securing the supply chain to secure III-V supply for the integrated laser technology.
- Over 15 patent families related to zero-optical-loss monitoring, heater-free stabilization, all-optical gearboxing (optical SerDes), optical switching, optical buffering, multi-function comb laser, and optical processing.
- 3.2Tbps DR8 Transmitter: In March 2026, the company introduced the NPG10240, the industry’s first 3.2Tbps PIC featuring 448Gbps per-lane modulators and integrated lasers.
- Intel & Credo Collaborations: The company has demonstrated 224G optical lanes in partnership with Intel and Credo, achieving 28 km reach – a feat that typically requires far more complex coherent DSP technology.
- Pluggable to CPO: Their technology is designed for a two-phase deployment – initially boosting the 800G/1600G LPO+™ (Linear Pluggable Optics) market (side by side with its chip for FRO DSP modules) and serving as a core component chiplet for up to 10Tbps Near-Packaged Optics (NPO) and Co-Packaged Optics (CPO).
AI infrastructure is no longer about compute in the abstract; it’s about the efficiency of the fabric. NewPhotonics is one of the few players that are actually removing the heating elements and DSP overhead that otherwise limit our cluster density.
A defining theme of this year’s Optical Fiber Conference (OFC 2026) was the shift from proprietary hardware to standardized, interoperable ecosystems, signaled by the formation of three major Multi-Source Agreements (MSAs). The Open CPX (Open Co-packaged eXchange) MSA, backed by heavyweights such as Microsoft, Marvell, and Ciena, is perhaps the most significant for the “socketed CPO” movement. It aims to define standardized specifications for optical engines and pluggable sockets, enabling hyperscalers to swap optical components within a co-packaged architecture as easily as they currently swap transceivers. Meanwhile, the OCI (Optical Compute Interconnect) MSA, led by a “who’s who” of AI silicon (NVIDIA, AMD, Broadcom, and OpenAI), focuses on the scale-up layer. By prioritizing NRZ modulation and silicon-centric designs, the OCI-MSA is standardizing the “chiplet-to-chiplet” optical links required to treat an entire rack of GPUs as a single, unified compute resource.
Simultaneously, the industry is preparing for a significant increase in faceplate density through the XPO (eXtra-dense Pluggable Optics) MSA. Organized by Arista Networks, this standard defines a liquid-cooled pluggable form factor capable of staggering 12.8 Tbps capacity per module. By utilizing 64 lanes at 200G per lane, XPO addresses the immediate physical constraints of hyperscale AI clusters, where traditional air cooling and standard OSFP form factors have reached their thermal and density limits. Together, these standards – Open CPX, OCI, and XPO – represent a concerted effort by the “foundry-to-hyperscaler” chain to commoditize silicon photonics, ensuring that the transition from copper to light remains a scalable manufacturing reality rather than a series of custom, one-off engineering projects.
Silicon photonics is the near-term workhorse for data movement. But once you accept “light as a first-class signal,” the roadmap bends toward stranger – and potentially more valuable – applications.
In-fiber computation (computing where the data already is): CogniFiber is a prime example. It is developing “in-fiber” photonic processors that use multi-core optical fiber to process data as light moves through the fiber, aiming for significant inference speedup and energy savings. This approach is innovative because it isn’t just about optics as a way to connect components; it’s optics serving as the actual computing platform. The main commercial question is whether these architectures will serve as niche accelerators for specific inference graphs and latency needs or evolve into a general layer within AI infrastructure.
Photonic fabrics (memory bandwidth without the copper penalty): Before its acquisition, Celestial AI raised $250M to develop photonics-based links designed to reduce memory-bandwidth bottlenecks between AI and memory chips—precisely where modern workloads stall. Marvell’s decision to acquire them signals that “photonic fabric” is now considered core infrastructure IP, not just an optional feature.
Quantum computing and quantum communication (using photons as qubits and secure links): Silicon photonics is one of the most promising platforms for scaling photonic quantum systems because it leverages industrial semiconductor manufacturing. PsiQuantum has publicly highlighted silicon photonics manufacturing at GlobalFoundries and has described mass production of its photonic chips as a key milestone toward building a practical machine. On the communication front, peer-reviewed research continues to demonstrate integrated-photonics approaches to scalable quantum key distribution networks – evidence that “quantum comms on chips” is progressing from laboratory prototypes to reliable, repeatable platforms.
This matters for market sizing: even if data-center interconnect is the growth engine, the same SiPh manufacturing and packaging innovations can spill over into quantum networking, sensing, and security infrastructure (often with defense-grade funding and longer product cycles).
Below is a curated, investor-focused shortlist, biased toward companies aligning with key control points in the stack (lasers-on-silicon, optical I/O chiplets, packaging-enabling platforms, and “beyond interconnect” compute).
Ten promising startups
Aloe Semiconductor: Silicon photonics + electronics focused on higher-speed lanes (e.g., dual polarization concepts and high-baud modulators), aiming at the next jump in per-lane throughput.
Avicena: MicroLED-based, ultra-low-power short-reach optical interconnects; announced a $65M Series B to scale its approach for AI fabrics.
CogniFiber: “Pure photonic computing” approach using multi-core optical fibers as programmable processors; positioned around inference performance-per-watt.
Luxtellingence: Designs and manufactures high-speed, low-loss optoelectronic systems integrated on chip. Leverages advanced materials such as thin-film lithium niobate and tantalate to break through the signal integrity limitations of silicon photonics and advance fiber optical data transmission in data centers and long-haul links.
PsiQuantum: Photonic quantum computing on silicon photonics manufacturing; has publicly described high-volume manufacturing progress with GlobalFoundries as a pathway to scale.
Quintessent: Develops ultra-compact silicon photonics components and subsystems that enable high-performance, energy-efficient optical interconnects for AI and data center infrastructure. Its proprietary heterogeneous integration platform combines III-V lasers with silicon photonics at wafer scale, delivering scalable, high-yield optical engines for next-generation co-packaged optics and pluggable transceivers.
Scintil Photonics: Heterogeneous photonics integration targeting AI data-center networks; reported a $58M (€50M) Series B to scale integrated photonics for “AI factories.”
Silith: a Singapore-based silicon photonics startup (founded in 2021) developing high-performance PIC-based transceiver solutions for AI data centers and telecom infrastructure. The company has rapidly achieved commercial scale, with over 6 million cumulative shipments of 100G and 200G per-lane products, establishing itself as a leading standalone PIC supplier with demonstrated manufacturability and customer traction. Silith is now pushing the next performance frontier, notably pioneering pure-silicon 400G/lane PAM4 solutions, highlighted by a live 400G/lane single-wavelength demonstration at OFC 2026. With vertically integrated capabilities spanning design, process, manufacturing, and high-speed interconnect technologies, and backed by global strategic investors, Silith is positioning itself as a scalable, cost-efficient enabler of next-generation optical interconnects.
Skorpios Technologies: Heterogeneous integration approach emphasizing embedded lasers/modulators/photodiodes in compact architectures, targeting simpler packaging and cost reduction.
Xscape Photonics: Multi-color photonics positioned to solve AI data-center “escape bandwidth”; reported a $44M Series A to accelerate its platform.
Six large companies that would benefit from an acquisition (and why)
NVIDIA: Optics is becoming a supply-chain and architecture bottleneck for GPU cluster scaling; its multibillion-dollar investments in optics indicate it sees photonics as strategic infrastructure worth controlling.
Broadcom: Switch ASIC leadership increases sensitivity to per-port power and front-panel bandwidth density; CPO directly influences those constraints.
Intel has a rich history in silicon photonics and could reinforce its position by acquiring next-generation laser integration, packaging, or optical chiplet IP as architectures develop.
Cisco Systems: If optics shift from pluggables to embedded engines, system vendors must exercise tighter control over optical roadmaps to prevent margin pressure caused by component shortages and integration issues. The acquisition of Acacia was both astute and strategic—and a success. Can Cisco replicate this achievement?
Microsoft: As chiplet-based custom silicon advances in hyperscale AI infrastructure, optical I/O transitions from a commodity to a strategic differentiator, enhancing performance-per-watt and cluster economics.
Meta Platforms: Maintains the same hyperscale pressure profile – AI training and inference fabrics are mainly affected by interconnect power; acquiring optical IP can reduce risks in roadmap timing and supply as market conditions tighten.
Silicon photonics is rapidly becoming crucial to AI infrastructure. As AI clusters grow, electrical interconnects reach their bandwidth and power limits, prompting hyperscalers and semiconductor companies to turn to optical technologies. The rise in investments and acquisitions by firms like AMD and Marvell Technology shows that major tech companies are rushing to develop photonics capabilities.
For startups, this presents a strategic opportunity. Demand for photonic interconnect technologies remains high, and major industry players are actively acquiring capabilities in optical I/O, integrated lasers, and advanced packaging. However, as more deals occur and core technology gaps are closed, the urgency to make acquisitions may decrease.
For founders and investors, now could be a good time to consider strategic exits. The photonics M&A cycle is accelerating, but it may not stay open forever. For acquirers, delaying is risky. The best opportunities are going quickly.
